Hechen Wang received the B.S. degree in micro-electronics and solid-electronics from the University of Electrical Science and Technology of China (UESTC), Chengdu, China, in 2012, the M.S. and Ph.D. degrees in electrical and computer engineering from Auburn University, Auburn, AL, USA, in 2013 and 2018, with a focus on the design of integrated digital frequency synthesizer circuits and time-to-digital converters. He has authored or co-authored more than 60 IEEE conference, journal papers, issued U.S. patents and book chapters. Dr. Wang was a recipient of the IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Best Student Paper Award in 2016, and the IEEE Custom Integrated Circuits Conference (CICC) Best Regular Paper Award in 2017.

ARTICLE

Nature

Analog chip paves the way for sustainable AI, NEWS AND VIEWS (2023)

JOURNALS

IEEE Journal of Solid State Circuits (JSSC)

A charge domain Compute-in-Memory SRAM macro with C-2C ladder based 8-bit linear MAC unit in Intel 16 for edge inference (2023)

An energy efficient Bayesian neural network accelerator with CiM and a time-interleaved Hadamard digital GRNG using 22nm FinFET (2023)

Sub-sampling direct RF-to-digital converter with 1024-APSK modulation for high throughput polar receiver (2020)

A reconfigurable Vernier time-to-digital converter with 2-D spiral comparator array and second-order ΔΣ linearization (2018)

An 802.11a/b/g/n digital fractional-N PLL with automatic TDC linearity calibration for spur cancellation (2017)

BOOK CHAPTERS

Chapter 5: Time-to-Digital Converters

Phase-Locked Frequency Generation and Clocking: Architectures and Circuits for Modern Wireless and Wireline Systems, edited by Woogeun Rhee

The Institution of Engineering and Technology, 2020

eISBN: 978-1-78561-886-4

CONFERENCES

IEEE Symposia on VLSI Technology and Circuits (VLSI)

A PVT robust signed 8-bit analog Compute-in-Memory accelerator with integrated activation functions for AI applications (2024)

A 32.2 TOPS/W SRAM Compute-in-Memory macro employing a linear 8-bit C-2C ladder for charge domain computation in 22nm for edge inference (2022)

A 3.8 mW sub-sampling direct RF-to-digital converter for polar receiver achieving 1.94 Gb/s data rate with 1024-APSK modulation (2019)

IEEE European Solid-State Circuits Conference (ESSCIRC)

A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology (2017)

IEEE Custom Integrated Circuits Conference (CICC)

A 280MS/s 12b SAR-assisted hybrid ADC with time domain sub-range quantizer in 45nm CMOS (2019)

A bidirectional lens-free digital-bits-in/-out 0.57mm2 Terahertz nano-radio in CMOS with 49.3mW peak power consumption supporting 50cm Internet-of-Things communication (2018)

A 330μW 1.25ps 400fs-INL Vernier time-to-digital converter with 2D reconfigurable spiral arbiter array and 2nd-order ΔΣ linearization (2017)

IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

An 802.11a/b/g/n digital fractional-N PLL with automatic TDC linearity calibration for spur cancellation (2016)

IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)

IEEE Bipolar/BiCMOS Circuit and Technology Meeting (BCTM)

A wide tuning triple-band frequency generator MMIC in 0.18μm SiGe BiCMOS technology (2014)

IEEE International Symposium on Circuits and Systems (ISCAS)

An 8-bit 80-MS/s fully self-timed SAR ADC with 3/2 interleaved comparators and high-order PVT stabilized HBT bandgap reference (2019)

IEEE Asian Solid-State Circuits Conference (A-SSCC)

Energy efficient BNN accelerator using CiM and a time-interleaved Hadamard digital GRNG in 22nm CMOS (2022)

PEER REVIEW

IEEE International Solid-State Circuits Conference (ISSCC) 2023-

IEEE International Electron Devices Meeting (IEDM) 2022-

IEEE International Symposium on VLSI Technology and Circuits (VLSI) 2022-

IEEE International Symposium on Circuits and Systems (ISCAS) 2022-

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) 2021-

IEEE Texas Symposium on Wireless and Microwave Circuits and Systems (WMCS) 2020-

IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) 2014-

TECHNICAL PROGRAM COMMITTEE & EDITOR & CHAIR

IEEE International Symposium on Quality Electronic Design (ISQED)

Conference Organizing Committee, Workshops/Tutorials Chair

Circuit Design, 3D Integration and Advanced Packaging (ICAP)

AWARDS

IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Best Student Paper Award 2017

IEEE Custom Integrated Circuits Conference (CICC) Best Regular Paper Award 2018

Intel Design and Test Technology Conference (DTTC) Best Paper Presentation Award 2022

Semiconductor Research Corporation (SRC) Mahboob Khan Outstanding Liaison Award 2022

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