Hechen Wang has filed 41 patents, including 4 World Intellectual Property Organization (WIPO) patent, 28 United States (US) patents, 2 European (EP) patents, 5 China (CN) patents, 2 German (DE) patents.



United States Patents

Patent No .: US 10,785,075 B2; US 10,958,491 B2; US 11,206,163 B2

2017-11-10 Priority date

2020-09-22 Granted; 2021-03-23 Granted; 2021-12-21 Granted


United States Patent

Patent No.: US 10,969,431 B1

2019-12-23 Priority date

2021-04-06 Granted

BAYESIAN NEURAL NETWORK AND METHODS AND APPARATUS TO OPERATE THE SAME; 改进的贝叶斯神经网络及其操作方法和装置; AN IMPROVED BAYESIAN NEURAL NETWORK AND METHODS AND APPARATUS TO OPERATE THE SAME


United States; China; European Application Publications

Publication number: US 20210034947 A1; CN 202111025847.1; EP 21190774.6

2020-10-20 Filed; 2021-09-02 Filed; 2021-11-08 Filed

2021-02-04 Publication; 2022-04-22 Publication; 2022-04-27 Publication


United States; China Application Publications

Publication number: US 20210150328 A1; CN 202111572045.2

2021-01-27 Filed; 2021-12-21 Filed

2021-05-20 Publication; 2022-07-29 Publication

TECHNIQUES FOR ANALOG MULTIBIT DATA REPRESENTATION FOR IN-MEMORY COMPUTING; 用于存储器内计算的模拟多比特数据表示的技术


United States; China Application Publications

Publication number: US 20220406392 A1; CN 202210549835 .7

2021-06-21 Filed; 2022-05-20 Filed; 

2022-12-22 Publication; 2023-01-06 Publication

ANALOG MULTIPLY-ACCUMULATE UNIT FOR MULTIBIT IN-MEMORY CELL COMPUTING; 用于多位存储单元中计算的模拟乘法-累加部件; ANALOGE MULTIPLY-ACCUMULATE-EINHEIT FÜR SPEICHERINTERNE MULTIBIT-ZELLENBERECHNUNG


United States; China; Germany Application Publications

Publication number: US 20220012016 A1; CN 202211019472.2; DE 10 2022 124 292 A1

2021-09-24 Filed; 2022-08-24 Filed; 2022-09-21 Filed

2022-01-13 Publication; 2023-04-04 Publication; 2023-05-04 Publication

ANALOG HARDWARE IMPLEMENTATION OF ACTIVATION FUNCTIONS; ANALOG HARDWARE IMPLEMENTATION OF ACTIVATION FUNCTIONS; 激活函数的模拟硬件实现方式


United States; European; China Application Publications

Publication number: US 20220138548 A1; EP 22205959.4A; CN 202211621045.1

2022-01-18 Filed; 2022-11-08 Filed; 2022-12-09 Filed; 

2022-05-05 Publication; 2023-07-19 Publication; 2023-07-21 Publication;

SRAM-BASED IN-MEMORY COMPUTING MACRO USING ANALOG COMPUTATION SCHEME


United States Application Publication

Publication number: US 0220366968 A1

2022-08-01 Application filed

2022-11-17 Publication

WEIGHT STATIONARY IN-MEMORY-COMPUTING NEURAL NETWORK ACCELERATOR WITH LOCALIZED DATA MULTIPLEXING 


United States Application Publication

Publication number: US 20220334801 A1

2022-06-30 Application filed

2022-10-20 Publication

HIGH DYNAMIC RANGE DIGITIZATION TECHNOLOGY FOR ANALOG COMPUTE-IN-MEMORY AND EDGE AI APPLICATIONS 


United States Application Publication

Publication number: US 20230229504 A1

2022-09-30 Application filed

2023-07-20 Publication

RECONFIGURABLE MULTIBIT ANALOG IN-MEMORY COMPUTING WITH COMPACT COMPUTATION


United States Application Publication

Publication number: US 20230289066 A1

2023-03-22 Application filed

2023-09-14 Publication

DYNAMIC COMPENSATION OF ANALOG CIRCUITRY IMPAIRMENTS IN NEURAL NETWORKS 


United States Application Publication

Publication number: US 20220222518 A1

2022-03-31 Application filed

2022-07-14 Publication

TECHNIQUES FOR ANALOG MULTIBIT DATA REPRESENTATION FOR IN-MEMORY COMPUTING


United States Application Publication

Publication number: US 20220406392 A1

2021-06-21 Application filed

2022-12-22 Publication

TECHNOLOGY TO REALIZE SIGNED MULTIPLY-ACCUMULATE OPERATION IN THE ANALOG DOMAIN WITH A DIFFERENTIAL SIGNAL PATH AND INTRINSIC PROCESS, VOLTAGE AND TEMPERATURE VARIATION TOLERANCE


United States Application Publication

Publication number: US 20230161559 A1

2023-01-25 Application filed

2023-05-05 Publication

ON-CHIP DIGITALLY CONTROLLED ERROR RATE-LOCKED LOOP FOR ERROR RESILIENT EDGE ARTIFICIAL INTELLIGENCE; ON-CHIP DIGITALLY CONTROLLED ERROR RATE-LOCKED LOOP FOR ERROR RESILIENT EDGE ARTIFICIAL INTELLIGENCE


United States; WIPO (PCT) Application Publications

Publication number: US 20230297149 A1; WIPO 2023177494 A1

2022-03-15 Filed; 2023-02-15 Filed

2023-09-21 Publication; 2023-09-21 Publication

ANALOG FORWARD ERROR CORRECTION


United States; Germany Application Publications

Publication number: US 20230198550 A1; DE 102022129883.3A

2021-12-16 Filed; 2022-11-11 Filed

2023-06-22 Publication; 2023-06-22 Publication

ROW REPAIR AND ACCURACY IMPROVEMENTS IN ANALOG COMPUTE-IN-MEMORY ARCHITECTURES


United States Application Publications

Publication number: US 20230251943 A1

2023-04-11 Filed

2023-08-10 Publication

TECHNIQUES FOR ERROR MITIGATION TO IMPROVE RELIABILITY FOR ANALOG COMPUTE-IN-MEMORY


United States Application Publications

Publication number: US 20240013850 A1

2023-09-25 Filed

2024-01-11 Publication

COMPUTE-IN-MEMORY SUPPORT FOR DIFFERENT DATA FORMATS


United States Application Publications

Publication number: US 20240020093 A1

2023-09-29 Filed

2024-01-18 Publication

TECHNIQUES FOR ERROR DETECTION IN ANALOG COMPUTE-IN-MEMORY


United States Application Publications

Publication number: US 20240020197 A1

2023-09-25 Filed

2024-01-18 Publication

HIERARCHICAL COMPUTE AND STORAGE ARCHITECTURE FOR ARTIFICIAL INTELLIGENCE APPLICATION


United States Application Publications

Publication number: US 20240045723 A1

2023-09-29 Filed

2024-02-08 Publication

IN-MEMORY ANALOG CHANNEL EQUALIZATION


United States Application Publications

Publication number: US 20240113698 A1

2022-09-30 Filed

2024-04-04 Publication

EMBEDDED SAR-ADC WITH LEAST SIGNIFICANT BIT SKIPPING BASED RELU ACTIVATION FUNCTION


United States Application Publications

Publication number: US 20240113725 A1

2023-12-14 Filed

2024-04-04 Publication